Wen Wen 温闻

Wen Wen 温闻

Principal Software Engineer at Cadence Design Systems, Inc. PhD in ECE, University of Pittsburgh

About

I am now working as a Principal Software Engineer at Cadence Design Systems. I received my PhD degree in Department of Electrical & Computer Engineering from University of Pittsburgh in 2020, and my Bachelor’s and Master’s Degrees from Southeast University, Nanjing, China. I interned at Micron Technology in Summer 2019, and Comcast in Fall 2018. More information can be found on my LinkedIn Profile.

Research

My PhD research topics included computer architecture, memory/storage system design for future computing systems with a focus on emerging memories, machine learning applications and hardware accelerators and GPU architectures, workload analysis with big data analytics techniques. My research work on resistive memory architecture was nominated as Best Paper Candidate of ICCAD 2017, and also selected as a Finalist Paper for NVMW Memorable Paper Award (NVMW 2018).

News

  • July 2020: Our paper “Accelerating 3D Vertical Resistive Memories with Opportunistic Write Latency Reduction” was accepted by ICCAD 2020.
  • June 2020: I successfully defended my PhD dissertation.
  • September 2019: Our paper “ReNEW: Enhancing Lifetime for ReRAM Crossbar based Neural Network Accelerators” was accepted by ICCD 2019.
  • August 2019: Our paper “Exploiting In-memory Data Patterns for Performance Improvement on Crossbar Resistive Memory” was accepted by TCAD.
  • April 2018: My work on “Improving Performance and Endurance for Crossbar Resistive Memory by Exploiting In-memory Data Patterns” was accepted to the ACM SIGDA PhD Forum at DAC 2018.
  • March 2018: I received EGSO/ECE Travel Grant Award at University of Pittsburgh.
  • February 2018: Our paper on wear leveling for crossbar resistive memory has been accepted by DAC 2018.
  • February 2018: Our paper on resistive memory has been selected as a Finalist Paper for NVMW Memorable Paper Award (NVMW 2018).
  • January 2018: Our paper on resistive memory has been accepted as talk by 9th Annual Non-Volatile Memories Workshop (NVMW 2018).
  • January 2018: Our paper on STT-MRAM based LLC has been accepted as poster by 9th Annual Non-Volatile Memories Workshop (NVMW 2018).
  • September 2017: Our paper “Read Error Resilient MLC STT-MRAM based Last Level Cache” was accepted by ICCD 2017.
  • August 2017: Our paper “Speeding Up Crossbar Resistive Memory by Exploiting In-memory Data Patterns” was nominated as Best Paper Candidate of ICCAD 2017.
  • June 2017: Our paper “Speeding Up Crsossbar Resistive Memory by Exploiting In-memory Data Patterns” was accepted by ICCAD 2017.

Selected Publications

[Also view my full publication list.]

  • [ICCAD 2020] Wen Wen, Youtao Zhang, and Jun Yang, “Accelerating 3D Vertical Resistive Memories with Opportunistic Write Latency Reduction”, The 39th IEEE/ACM International Conference on Computer-Aided Design (ICCAD 2020), Virtual Event, USA, November 2020.

  • [ICCD 2019] Wen Wen, Youtao Zhang, and Jun Yang, “ReNEW: Enhancing Lifetime for ReRAM Crossbar based Neural Network Accelerators”, The 37th IEEE International Conference on Computer Design (ICCD 2019), Abu Dhabi, UAE, November 2019.

  • [TCAD] Wen Wen, Lei Zhao, Youtao Zhang, and Jun Yang, “Exploiting In-memory Data Patterns for Performance Improvement on Crossbar Resistive Memory”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 39 (10):2347 - 2360, 2020.

  • [DAC 2018] Wen Wen, Youtao Zhang, and Jun Yang, “Wear Leveling for Crossbar Resistive Memory”, The 55th ACM/ESDA/IEEE Design Automation Conference (DAC 2018), San Francisco, CA, June 2018.

  • [ICCAD 2017] Wen Wen, Lei Zhao, Youtao Zhang, and Jun Yang, “Speeding Up Crossbar Resistive Memory by Exploiting In-memory Data Patterns”, The 36th IEEE/ACM International Conference on Computer-Aided Design (ICCAD 2017), Irvine, CA, November 2017.

  • [ICCD 2017] Wen Wen, Youtao Zhang, and Jun Yang, “Read Error Resilient MLC STT-MRAM based Last Level Cache”, The 35th IEEE International Conference on Computer Design (ICCD 2017), Boston, MA, November 2017.

  • [MICPRO] Wen Wen, Jun Yang, and Youtao Zhang, “Optimizing Power Efficiency for 3D Stacked GPU-In-Memory Architecture”, Elsevier Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Vol. 49: 44-53, 2017.

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